In electronic circuit design, simulations are often performed before physical prototypes are constructed. In electronic package and multi-layer printed circuit board (PCB) simulation, electromagnetic effect due to currents flowing in via pins that passing through one or more conductive planes needs to be considered.
U.S. Pat. No. 5,504,423 discloses a method for modeling electronic package structures that include via pins based on mode decomposition. Effects of interaction between via pins and conductive planes can be taken into account during simulation. The content of U.S. Pat. No. 5,504,423 is fully incorporated herein by reference in its entirety.
U.S. Pat. No. 5,566,083 discloses a method for analyzing voltage fluctuations in multi-layered electronic packaging structures. Impedance transformation is performed to match effective input impedance of a numerical model to the input impedance of the physical structure, thereby allowing accurate simulation of the physical structure. The content of U.S. Pat. No. 5,566,083 is fully incorporated herein by reference in its entirety.